Peripheral Component Interconnect Express (PCIe) is a high-speed serial computer expansion bus standard. PCIe improves on older bus standards by including a higher maximum system bus throughput, lower input/output pin counter, a smaller physical footprint, and better performance scaling for bus devices. One of the key differences between PCIe and the older bus standards is PCIe is based on point-to-point topology (i.e., opposed to a shared parallel bus architecture). Each PCIe bus can include a number of different lanes (e.g., x1, x2, x4, x8, x16, x32). A lane is composed of two differential signal pairs (i.e., transmit and receive). Each lane is uses as a full-duplex byte stream and can transmit and receive data packets in one-byte (i.e., eight-bit) format simultaneously in both directions. A PCIe interface can receive a PCIe adapter for connecting an endpoint (e.g., a server, solid-state disk drive, disk bay, network device, etc.). The PCIe adapter can include one or more PCIe switches configured to enable multiple endpoints out of the one endpoint. Thus, a PCIe switch can enable one endpoint to be shared by multiple devices.
Solid-state drives (SSD) are one endpoint device that can connect through the PCIe bus as described above. Non-Volatile Memory Express (NVMe) is a specification (i.e., logical interface) for accessing SSDs attached through a PCIe bus. Since, PCIe is a point-to-point topology (one endpoint connected to one endpoint) typically only one endpoint can access the NVMe SSD. While PCIe switches can enable multiple endpoints access to a single endpoint, there is currently no way to enable multiple endpoints access to a single endpoint simultaneously.